The present invention relates to a digital signal processing apparatus for use in analyzing power spectrum of discrete data sequences such as detected outputs of a blood flowmeter using ultrasound Doppler effect (hereinafter called "Doppler blood flowmeter").
Recently, the Doppler blood flowmeter has been put in practical use in circulatory system diagnostic field. The Doppler blood flowmeter is capable of measuring blood flow speed in a human blood vessel by frequency analyzing an echo signal which is reflected from blood corpuscles and shifted in frequency by the Doppler effect. In the Doppler blood flowmeter, an ultrasonic pulse train having constant period is transmitted in a human body from an ultrasonic probe. The ultrasonic pulse is reflected by the blood corpuscles in a blood and shifted in frequency by Doppler modulation. The Doppler shifted echo signal is received by the ultrasonic diagnostic probe and amplified by an amplifier. The amplified echo signal is multiplied in a detector by signals each of which is formed from a reference pulse train by shifting 0.degree. and 90.degree. in phase. Each of the multiplied signals is integrated by an integrating circuit in a determined gating period and added to an analog-to-digital converter after removing low frequency signals corresponding to blood vessel wall, valve and so on through a high-pass filter. A digital signal obtained from the analog-to-digital converter is frequency analyzed by a digital Fourier transformer and displayed as a sonogram.
In the digital Fourier transformer, an exclusive digital signal processing unit having a fundamental algorithm of FFT (Fast Fourier Transform) is usually employed. For example, a Doppler blood flowmeter system using FFT algorithm is known in which the power spectrum of complex data sequences of 128 points is analyzed at intervals of two (2) milliseconds. In the FFT algorithm each of real addition and subtraction and real multiplication of a fixed multiplier involve 2,368 steps and 1,152 steps, respectively. To perform the above noted steps of FFT operation within a one (1) millisecond interval, a high speed digital multiplier is required. An IC (integrated circuit) having a 100 nanoseconds operation time is now available, but the IC cannot select bit length freely to obtain sufficient precision of operation. Furthermore, the IC is not of a standard type and very costly.
On the other hand, it is desirable to simplify the operating circuit by adopting an operating circuit using fixed decimal point rather than an operating circuit using floating decimal point. Accordingly, the operating circuit using fixed decimal point is used in the conventional system. However, overflow in the operation sometimes occurs in the operating circuit using fixed decimal point because the echo signals from the blood vessel wall or valve moving in high speed are mixed with the echo signal from the corpuscles. The echo signals from the blood vessel wall or valve moving in high speed have large power spectra and lie within the range of the echo signal from the blood corpuscles. Therefore, the echo signals from the blood vessel wall or valve is impossible to remove by a filter circuit.